Symposium Schedule

9:15 Registration Starts / Door Open
Session Chair: Toshiya Hirai, Murata Manufacturing
9:45 Opening Remarks from AEC/APC Asia
Hidetaka Nishimura
Renesas Electronics
9:50 Program Outline
Hidenori Kakinuma
Toshiba Memory
9:55
Tutorial-1
Semantic Web Technologies for data Interoperability: Ontology, Schema, and Linked Data
Prof. Hideaki Takeda, Dr.,Eng.
National Institute of Informatics
Session Co-chairs: Takahiro Tsuchiya, MIE FUJITSU SEMICONDUCTOR / Senichi Nishibe, KLA-Tencor Japan
10:40 [TDA-O-13] Precise In-situ Detection of Wafer Film Thickness by Tilting Light Irradiation
Soichiro Eto
Hitachi
11:00 [TDA-O-14] RIE Equipment Control by Cross-sectional Trench Area Prediction
Xueting Wang
TOSHIBA ELECTRONIC DEVICES & STORAGE
11:20 [TDA-O-15] Wafer warpage classification adapted to pragmatic equipment operation
Motoi Okada
Tokyo Electron
11:40 [TDA-O-20] FDC of Wafer Handling Robot Based on Neural Network with Harmonic Sensor
Kenta Kamizono
Panasonic
12:00 Lunch Break & Supplier Exhibition
Session Chair: Takashi Kurosawa, Azbil
12:50 Introduction for Posters (3mins Summary Presentation)
[TDA-P-12] Improving Root Cause Analysis Accuracy Using Advanced Sensor Trace Analytics
KK Gan
BISTel America
[TDA-P-24] Performance Evaluations of VM models of Multi-dimensional quality: Open data applications
Huizhen Bu
Tsukuba Univ.
[P3]
[P4]
[P5]
Session Chair: Shunichi Shibuki, Sony Semiconductor Manufacturing
13:10
Keynote
The manufacturing and future of Sony CMOS Image Sensor
Mr.Shingo Kadomura
Sony Semiconductor Manufacturing
Session Co-chairs: Hisato Tanaka, Tokyo Electron / Tomoya Tanaka, TowerJazz Panasonic Semiconductor
13:55 [TDA-O-11] Optimizing Production Performance Through Trace-level Chamber Analysis
Tom Ho
BISTel America
14:15 [TDA-O-22] Robust Estimation of Mixed-Type Wafer Map Similarity Utilizing Non-negative Matrix Factorization
Yukako Tanaka
Toshiba Memory
14:35 [TDA-O-23] Integrated 2D quality VM modeling: Upscaling and evaluations of High-dimension Low-samples
Huizhen Bu
Tsukuba Univ.
14:55 [MPC-O-17] Endpoint Prediction for ICP Etching Process with Smart VM Method
Junya Nishiguchi
Azbil
15:15 Supplier Exhibition / Coffee Break
Session Chair: Koh Horimoto, IBM Japan Services
15:40
Tutorial-2
Secured and Operation Oriented Recipe Management on SEMI Standard
Osamu Ohishi
IBM Japan Services
Session Co-chairs: Koichi Sakamoto, Tokyo Electron / Kazutaka Nagashima, Toshiba Electronic Devices & Storage
16:25 [EPC-O-18] Adaptive Re-tuning of PID Parameters by Health Indexes
Naotoshi Taniguchi
Azbil
16:45 [EPC-O-19] Implementation of VM-APC Automated Execution System for Cu-CMP Process
Masatoshi Ikeda
Sony Semiconductor Manufacturing
17:05 [EPC-O-21] In-house development of Lithography Metrology Tools Recipe Validation System to ensure Recipe Integrity and Data feedforward to Process APC Systems
Yap Hoon Lian
Global Foundries
17:25 [APC-O-16] All roads leads to the Environment
George Hoshi
Tokyo Electron
17:45 Closing
Session Chair: Koichi Sakamoto, Tokyo Electron
18:00 Reception (Poster Session / Author's Interview/ Supplier Exhibition)
19:20 Closing Remarks & Best Paper Award
Hidenori Kakinuma, Toshiba Memory
20:00 End